STM32L151CBT7ADTR datasheet(99/130 Pages) STMICROELECTRONICS

Part #	STM32L151CBT7ADTR

Description	Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3,128KB Flash, 32KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC

PDF	130 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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99 / 130 page

DocID024330 Rev 5

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STM32L151x6/8/B-A STM32L152x6/8/B-A

Electrical characteristics

105

Figure 28. Maximum dynamic current consumption on VREF+ supply pin during ADC

conversion

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 12, depending on

whether VREF+ is connected to VDDA or not. The 100 nF capacitors should be ceramic (good

quality). They should be placed as close as possible to the chip.

ADC clock

Sampling (n cycles)

Conversion (12 cycles)

Iref+

300µA

700µA

MS36686V1

Table 57. Maximum source impedance RAIN max(1)

(µs)

RAIN max (kOhm)

Ts (cycles)

fADC= 16 MHz(2)

Multiplexed channels

Direct channels

2.4 V < VDDA< 3.6 V 1.8 V < VDDA < 2.4 V 2.4 V < VDDA< 3.3 V 1.8 V < VDDA < 2.4 V

0.25

Not allowed

0.7

Not allowed

0.5625

0.8

Not allowed

2.0

1.0

2.0

0.8

4.0

3.0

1.5

3.0

1.8

6.0

4.5

6.8

4.0

15.0

10.0

15.0

10.0

30.0

20.0

32.0

25.0

50.0

40.0

192

50.0

384

1. Guaranteed by design.

2. Number of samples calculated for fADC = 16 MHz. For fADC = 8 and 4 MHz the number of sampling cycles can be

reduced with respect to the minimum sampling time Ts (us).

STM32L151CBT7ADTR Datasheet(PDF) 99 Page - STMicroelectronics

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