PS402-01XX datasheet(21/46 Pages) MICROCHIP

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 2003 Microchip Technology Inc.

DS21766A-page 21

PS402-01XX

7.0

SMBus/SBData INTERFACE

The PS402 uses a two-pin System Management Bus

(SMBus) protocol to communicate to the Host. One pin

is the clock and one is the data. The SMBus port

responds to all commands in the Smart Battery Data

Specification (SBData). To receive information about

the battery, the Host sends the appropriate commands

to the SMBus port. Certain alarms, warnings and

charging information may be sent to the Host by

the PS402 automatically. The SMBus protocol is

explained in this chapter. The SBData command set is

summarized in Table 7-1.

The PS402 SMBus communications port is fully

compliant with the System Management Bus Specifica-

tion, Version 1.1 and supports all previous and new

requirements, including bus time-outs (both slave and

master), multi-master arbitration, collision detection/

recovery and PEC (CRC-8) error checking. The SMBus

port serves as a Slave for both read and write func-

tions, as well as a Master for write word functions.

SMBus slave protocols supported include Read Word,

Write Word, Read Block and Write Block, all with or

without PEC (CRC-8) error correction. Master mode

supports Write Word protocols. The PS402 meets and

exceeds the Smart Battery Data Specification, Version

1.1/1.1a requirements. The PS402 is compliant with

System Management Bus Specification 1.0.

The PS402 fully implements the Smart Battery Data

(SBData) Specification v1.1. The SBData Specification

defines the interface and data reporting mechanism for

an SBS compliant Smart Battery. It defines a consistent

set of battery data to be used by a power management

system to improve battery life and system run-time,

while providing the user with accurate information. This

is accomplished by incorporating fixed, measured,

calculated and predicted values, along with charging

and alarm messages, with a simple communications

mechanism between a Host system, Smart Batteries

and a Smart Charger.

The PS402 provides full implementation of the SBData

set with complete execution of all the data functions,

including sub-functions and control bits and flags,

compliance to the accuracy and granularity associated

with particular data values, and proper SMBus

protocols and timing.

7.1

SBData Function Description

The following subsections document the detailed

operation of all of the individual SBData commands.

7.1.1

ManufacturerAccess (0x00)

Reports internal software version when read, opens

EEPROM for programming when written with the

password.

7.1.2

RemainingCapacityAlarm (0x01)

Sets or reads the low capacity alarm value. Whenever

the remaining capacity falls below the low capacity

alarm

value,

the

Smart

Battery

sends

alarm

warning messages to the SMBus Host with the

REMAINING_CAPACITY_ALARM

bit

set.

low

capacity alarm value of ‘0’ disables this alarm.

7.1.3

RemainingTimeAlarm (0x02)

Sets or reads the remaining time alarm value.

Whenever the AverageTimeToEmpty falls below the

remaining time value, the Smart Battery sends alarm

warning messages to the SMBus Host with the

REMAINING_TIME_ALARM bit set. A remaining time

value of ‘0’ disables this alarm.

7.1.4

BatteryMode (0x03)

This function selects the various Battery Operational

modes and reports the battery's capabilities, modes

and condition.

Bit 0: INTERNAL_CHARGE_CONTROLLER

Bit set indicates that the battery pack contains its own

internal charge controller. When the bit is set, this

optional function is supported and the CHARGE_

CONTROLLER_ENABLED bit will be activated.

Bit 1: PRIMARY_BATTERY_SUPPORT

Bit set indicates that the battery pack has the ability to

act as either the primary or secondary battery in a

system. When the bit is set, this optional function is

supported and the PRIMARY_BATTERY bit will be

activated.

Bit 2-6: Reserved

Bit 7: CONDITION_FLAG

Bit set indicates that the battery is requesting a

conditioning cycle. This typically will consist of a full

charge to full discharge back to full charge of the pack.

The battery will clear this flag after it detects that a

conditioning cycle has been completed.

Bit 8: CHARGE_CONTROLLER_ENABLED

Bit is set to enable the battery pack's internal charge

controller. When this bit is cleared, the internal charge

controller is disabled (default). This bit is active only

when the INTERNAL_CHARGE_CONTROLLER bit is

set.

Bit 9: PRIMARY_BATTERY

Bit is set to enable a battery to operate as the primary

battery in a system. When this bit is cleared, the battery

operates in a secondary role (default). This bit is active

only when the PRIMARY_BATTERY_SUPPORT bit is

set.

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