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S71PL032J04BAWTZ2 Datasheet(PDF) 12 Page - SPANSION

Part # S71PL032J04BAWTZ2
Description  Based MCPs
PDF  24 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
Logo SPANSION - SPANSION

S71PL032J04BAWTZ2 Datasheet(HTML) 12 Page - SPANSION

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S71PL-J Based MCPs
S71PL-J_00_B3 March 17, 2006
Ad van c e
Inf o rmation
Pin Description
A21–A0
=
22 Address Inputs (Common)
DQ15–DQ0
=
16 Data Inputs/Outputs (Common)
CE1#f
=
Chip Enable 1 (Flash)
CE#f2
=
Chip Enable 2 (Flash)
CE1#ps
=
Chip Enable 1 (pSRAM)
CE2ps
=
Chip Enable 2 (pSRAM)
OE#
=
Output Enable (Common)
WE#
=
Write Enable (Common)
RY/BY#
=
Ready/Busy Output (Flash 1)
UB#
=
Upper Byte Control (pSRAM)
LB#
=
Lower Byte Control (pSRAM)
RESET#
=
Hardware Reset Pin, Active Low (Flash 1)
WP#/ACC
=
Hardware Write Protect/Acceleration Pin (Flash)
VCCf
=
Flash 3.0 volt-only single power supply (see Product
Selector Guide for speed options and voltage supply
tolerances)
VCCps
=
pSRAM Power Supply
VSS
=
Device Ground (Common)
NC
=
Pin Not Connected Internally
Logic Symbol
22
16
DQ15–DQ0
A21–A0
CE1#f
OE#
WE#
RES ET#
R Y/BY#
WP #/ACC
UB#
CE2#f
CE2ps
CE1#ps
LB#



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