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January 18, 2011

CPS-10Q

CPS-10Q Datasheet

2010 Integrated Device Technology, Inc. All rights reserved.

Receiver Specifications

LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section.

The receiver input impedance results in a differential return loss better than 10 dB and a common mode return loss better than 6 dB from 100 MHz to

(0.8)*(Baud Frequency). This includes contributions from on-chip circuitry, the chip package and any off-chip components related to the receiver. AC

coupling components are included in this requirement. The reference impedance for return loss measurements is 100 Ohm resistive for differential

return loss and 25 Ohm resistive for common mode.

NOTE:

1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The sinusoidal jitter may have any amplitude and

frequency in the unshaded region of Figure 16. The sinusoidal jitter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other

variable system effects.

NOTE:

1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The sinusoidal jitter may have any amplitude and

frequency in the unshaded region of Figure 16. The sinusoidal jitter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other

variable system effects.

Symbol

Parameter

Range

Unit

Notes

Min

Max

VIN

Differential Input Votlage

200

1600

mV p-p

Measured at receiver

JD

Deterministic Jitter Tolerance

0.37

-

UI p-p

Measured at receiver

JDR

Combined Deterministic and Ran-

dom Jitter Tolerance

0.55

-

UI p-p

Measured at receiver

JT

Total Jitter Tolerance(1)

0.65

-

UI p-p

Measured at receiver

SMI

Multiple Input Skew

-

24

ns

Skew at the receiver input between

lanes of a multilane link

BER

Bit Error Rate

10-12

UI

Unit Interval

800

800

ps

+/- 100 ppm

Table 24 Receiver AC Timing Specifications - 1.25 GBaud

Symbol

Parameter

Range

Unit

Notes

Min

Max

VIN

Differential Input Votlage

200

1600

mV p-p

Measured at receiver

JD

Deterministic Jitter Tolerance

0.37

-

UI p-p

Measured at receiver

JDR

Combined Deterministic and Ran-

dom Jitter Tolerance

0.55

-

UI p-p

Measured at receiver

JT

Total Jitter Tolerance(1)

0.65

-

UI p-p

Measured at receiver

SMI

Multiple Input Skew

-

24

ns

Skew at the receiver input between

lanes of a multilane link

BER

Bit Error Rate

10-12

UI

Unit Interval

400

400

ps

+/- 100 ppm

Table 25 Receiver AC Timing Specifications - 2.5 GBaud