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DAC1408D750 Datasheet(PDF) 76 Page - Renesas Technology Corp |
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DAC1408D750 Datasheet(HTML) 76 Page - Renesas Technology Corp |
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76 / 96 page ![]() DAC1408D750 4 © IDT 2012. All rights reserved. Product data sheet Rev. 04 — 2 July 2012 76 of 96 Integrated Device Technology DAC1408D750 2 , 4 or 8 interpolating DAC with JESD204A Table 139. DBG_CNTRL register (address 1Eh) bit description Bit Symbol Access Value Description 7 BER_MODE R/W simple BER-measurement 0 no action 1 simple BER-measurement enabled 6 INTR_CLEAR R/W interrupts clear 0 no action 1 clear interrupts (to '1') 5 to 3 INTR_MODE[2:0] R/W interrupt settings 000 global interrupt depends on lane 0 001 global interrupt depends on lane 1 010 global interrupt depends on lane 2 011 global interrupt depends on lane 3 100 global interrupt depends on lane 0 or lane 1 101 global interrupt depends on lane 2 or lane 3 110 global interrupt depends on lane 0 or lane 1 or lane 2 or lane 3 111 no interrupt Table 140. PAGE_ADDRESS register (address 1Fh) bit description Bit Symbol Access Value Description 2 to 0 PAGE[2:0] R/W 0h page_address Table 141. Counter source Default settings are shown highlighted. SEL_CFC_LNn[2:0] Source 000 not-in-table error 001 disparity error 010 K symbol found 011 unexpected K symbol found 100 K28_7 (/F/) symbol found 101 K28_5 (/K/) symbol found 110 K28_3 (/A/) symbol found 111 K28_0 (/R/) symbol found Table 142. Code group synchronization state machine CS_STATE_LNn[1:0] Definition 00 looking for K28_5 (/K/) symbol 01 four consecutive K28_5 (/K/) symbols have been received 10 code group synchronization achieved 11 not applicable |
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