P25Q32SL datasheet(21/111 Pages) PUYA

21 / 111 page

P25Q32SL Datasheet

Puya Semiconductor

Page 21 of 111

QPI Reset

(66h + 99h)

QPI

Hardware

Reset

Disable QPI (FFh)

Enable QPI (38h)

SPI Reset

(66h + 99h)

Standard SPI

Dual SPI

Quad SPI

Hardware

Reset

Device Initialization

& Status Register Refresh

Power Up

Standard SPI

The P25Q32SL features a serial peripheral interface on 4 signals bus: Serial Clock (SCLK), Chip Select

(CS#), Serial Data Input (SI) and Serial Data Output (SO). Both SPI bus mode 0 and 3 are supported. Input

data is latched on the rising edge of SCLK and data shifts out on the falling edge of SCLK.

Dual SPI

The P25Q32SL supports Dual SPI operation when using the “Dual Output Fast Read” and “Dual I/O Fast

Read”(3BHand BBH) commands. These commands allow data to be transferred to or from the device at two

times the rate of the standard SPI. When using the Dual SPI command the SI and SO pins become

bidirectional I/O pins: IO0 and IO1.

Quad SPI

The P25Q32SL supports Quad SPI operation when using the “Quad Output Fast Read”,” Quad I/O Fast

Read”(6BH,EBH,E7H) commands. These commands allow data to be transferred to or from the device at four

times the rate of the standard SPI. When using the Quad SPI command the SI and SO pins become

bidirectional I/O pins: IO0 and IO1, and WP# and HOLD# pins become IO2 andIO3. Quad SPI commands

require the non-volatile Quad Enable bit(QE) in Status Register to be set.

QPI

The P25Q32SL supports Quad Peripheral Interface (QPI) operations only when the device is switched from

Standard/Dual/Quad SPI mode to QPI mode using the “Enable the QPI (38H)” command. The QPI mode

utilizes all four IO pins to input the command code. Standard/Dual/Quad SPI mode and QPI mode are

exclusive. Only one mode can be active at any given times. “Enable the QPI(38H)”and “Disable the

QPI(FFH)”commands are used to switch between these two modes. Upon power-up and after software reset

using “”Reset (99H)”command, the default state of the device is Standard/Dual/Quad SPI mode. The QPI

mode requires the non-volatile Quad Enable bit (QE) in Status Register to be set.

P25Q32SL Datasheet(PDF) 21 Page - Puya Semiconductor Co., Ltd.

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