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NB4L16M Datasheet(PDF) 10 Page - ON Semiconductor

Part # NB4L16M
Description  2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Translator with Internal Termination
PDF  12 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB4L16M Datasheet(HTML) 10 Page - ON Semiconductor

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NB4L16M
http://onsemi.com
10
Application Information
All NB4L16M inputs can accept LVPECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential
input signal (LVDS, PECL, or CML) are minimum input swing of 75 mV and the maximum input swing of 2500 mV. Within
these conditions, the input voltage can range from VCC to 1.2 V. Examples interfaces are illustrated below in a 50 W
environment (Z = 50
W).
50 W
VCC
D
D
50 W
VCC
VTD
VEE
VCC
Q
50 W 50 W
VEE
Figure 20. CML to CML Interface
Z
Q
Z
Figure 21. PECL to CML Receiver Interface
50 W
Z
Z
VCC
VCC
PECL
Driver
D
D
50 W
VEE
VBIAS
VTD
VEE
RT
RT
VEE
VCC
RT
5.0 V 290 W
3.3 V 150 W
2.5 V 80 W
Recommended RT Values
50 W
50 W
VCC
VTD
VBIAS
VTD



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