AD5665-RBRUZ-2 datasheet(7/32 Pages) AD

Part #	AD5665-RBRUZ-2

Description	Quad, 12-/14-/16-Bit nanoDACs with 5ppm/째C On-chip Ref, I2C Interface

PDF	32 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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7 / 32 page

Preliminary Technical Data

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. PrA. | Page 7 of 32

Limit at TMIN, TMAX

Parameter

Conditions2

Min

Max

Unit

Description

t12

Standard mode

300

tFCL, fall time of SCL signal

Fast mode

300

High speed mode, CB = 100 pF

High speed mode, CB = 400 pF

tSP4

Fast mode

Pulse width of spike suppressed

High speed mode

1See Figure 2. High speed mode timing specification applies only to the AD5625BRUZ-2 and AD5665BRUZ-2.

2CB refers to the capacitance on the bus line.

3The SDA and SCL timing is measured with the input filters enabled. Switching off the input filters improves the transfer rate but has a negative effect on EMC behavior

of the part.

4 Input filtering on the SCL and SDA inputs suppress noise spikes that are less than 50 ns for fast mode or 10 ns for high speed mode.

Figure 2. 2-Wire Serial Interface Timing Diagram

AD5665-RBRUZ-2 Datasheet(PDF) 7 Page - Analog Devices

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