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4LS

Functional Description

Datasheet

• PUBLIC

DS000542

• v3-01 • 2022-Nov-17

114

│ 45

Parameters

Clocks

FCT

778

MTA => Max Line Rate

1318 => 45.63 kLines/s

DTI

Max Integration Time

1250 => 20.833 µs

Minimum LVALLow_Period

Figure 65:

12-Bit Timing Clocks for Readout Mode 4-To-1

Parameters

Clocks

Readout Data

2576

Readout Time

2614

FCT

778

MTA => Max Line Rate

2614 => 22.95 kLines/s

DTI

Max Integration Time

2546 => 42.434 µs

Minimum LVALLow_Period

8-Bit mode @80 MHz

Below described is an example to calculate the maximum line rate for 8-bit @ 80 MHz, with the same

sensor configurations for 12-bit, with the exception of End of Range.

●

Output mode: 12-bit @ 60 MHz

●

Readout mode: 1-To-1 LVDS

●

ADC response stabilization OFF

●

Auto-start AD OFF

●

Auto-start readout OFF

●

End of Range = 0x3F

Once the ADC Time (relative to the FCT) is lower than Readout Time, then the MTA is calculated with

the respective Equation 2. Moreover, it can be used the original SAMPLE value of 1 µs (80 clocks).

Figure 66:

8-Bit Timing Clocks for Readout Mode 1-To-1

Parameters

Clocks

RST_CDS

100

ADC Time

280

Readout Data

644

Readout Time

670

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