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HD64F2633RF28 Datasheet(PDF) 86 Page - Renesas Technology Corp |
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HD64F2633RF28 Datasheet(HTML) 86 Page - Renesas Technology Corp |
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86 / 1453 page ![]() 32 Type Symbol I/O Name and Function Operating mode control MD2 to MD0 Input Mode pins: These pins set the operating mode. The relation between the settings of pins MD2 to MD0 and the operating mode is shown below. These pins should not be changed while the H8S/2633 Series is operating. MD2 MD1 MD0 Operating Mode 000— 1— 10— 1— 1 0 0 Mode 4 1 Mode 5 1 0 Mode 6 1 Mode 7 System control RES Input Reset input: When this pin is driven low, the chip is reset. MRES Input Manual reset: When this pin is driven low, a transmission is made to manual reset mode. STBY Input Standby: When this pin is driven low, a transition is made to hardware standby mode. BREQ Input Bus request: Used by an external bus master to issue a bus request to the H8S/2633 Series. BREQO Output Bus request output: The external bus request signal used when an internal bus master accesses external space in the external bus-released state. BACK Output Bus request acknowledge: Indicates that the bus has been released to an external bus master. FWE Input Flash write enable: Pin for flash memory use (in planning stage). |
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