HD64F2633RF28 datasheet(21/1453 Pages) RENESAS

21 / 1453 page

Section

Page

Item

Description

24.2.1 Standby

Control Register

989

Bit 7—Software Standby

(SSBY)

Note * added

(SBYCR)

990

Bits 6 to 4—Standby Timer

Select 2 to 0 (STS2 to STS0)

Note * added and

Description amended

(Setting Prohibited) added to

Bits 6 to 4 table

Bit 3—Output Port Enable

(OPE)

Note * added

24.2.2

System Clock

Control Register

(SCKCR)

991, 992

Bit 7—ø Clock Output Disable

(PSTOP), Bit 3—Frequency

Multiplication Factor Switch

Mode Select (STCS), Bits 2 to

0—System Clock Select (SCK2

to SCK0)

Note * added

24.2.3 Low-Power

Control Register

(LPWRCR)

992

H8S/2633R added to bit

table for H8S/2633 Series

H8S/2695 bit table and Note

* added

993, 994

Bit 7—Direct Transfer On Flag

(DTON) and Bit 6—Low Speed

ON Flag (LSON)

Note *, *2 added

24.2.4 Timer

Control/Status Register

(TCSR)

995, 996

Note *1 added

24.5.1 Module Stop

999

Note * added

Mode

1000

Table 24-4 MSTP Bits and

Corresponding On-Chip

Supporting Modules

Note *2 added

24.5.2 Usage Notes

1001

Description of Reading I/O

Ports in Subactive Mode

added

24.6.3 Setting

Oscillation Stabilization

Time after Clearing

Software Standby

Mode

1003

Table 24-5 Oscillation

Stabilization Time Settings

Under Standby Time, 16

states changed to 16 states

(setting prohibited)

Note * deleted.

HD64F2633RF28 Datasheet(PDF) 21 Page - Renesas Technology Corp

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