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74AVC2T45GS Datasheet(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74AVC2T45GS Datasheet(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 25 page ![]() Nexperia 74AVC2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3-state VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aae331 VEXT VCC VI VO DUT CL RT RL RL G Test data is given in Table 15. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig. 8. Test circuit for measuring switching times Table 15. Test data Supply voltage Input Load VEXT VCC(A), VCC(B) VI [1] Δt/ΔV [2] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [3] 1.1 V to 1.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 1.65 V to 2.7 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 3.0 V to 3.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO [1] VCCI is the supply voltage associated with the data input port. [2] dV/dt ≥ 1.0 V/ns [3] VCCO is the supply voltage associated with the output port. 74AVC2T45 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 10 — 4 November 2021 12 / 25 |
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