 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
S32K311NHT0MPAST Datasheet(PDF) 49 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
S32K311NHT0MPAST Datasheet(HTML) 49 Page - NXP Semiconductors |
|
|
49 / 146 page  Table 14. V11 regulator (NMOS ballast transistor control) electrical specifications (continued) Symbol Description Min Typ Max Unit Condition Spec Number CNMOS NMOS gate stability capacitor — 1 — nF — — 6.11 Supply currents All data in this table is preliminary and based on first samples. NOTE Typical current numbers are indicative for typical silicon process and may vary based on the silicon distribution and user configuration. Typical conditions assumes VDD_HV_A = VREFH = 5 V, VDD_HV_B = 5V (if the VDD_HV_B domain present in the device), temperature = 25 °C, and typical silicon process unless otherwise stated. In STANDBY configuration, no current flows through the V15 supply. NXP Semiconductors Power management S32K3xx Data Sheet, Rev. 7, 04/2023 Data Sheet: Technical Data Preliminary Information 49 / 146 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
