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TMPR4925 Datasheet(PDF) 232 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 232 Page - Toshiba Semiconductor |
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232 / 590 page ![]() Chapter 9 SDRAM Controller 9-4 9.3.2 Address Mapping 9.3.2.1 Physical Address Mapping It is possible to map each of the four channels to an arbitrary physical address using the Base Address field (SDCCRn.BA[31:21]) of the SDRAM Channel Control Register and the Address Mask Field (SDCCRn.AM[31:21]). The channel that becomes True in the following equation is selected. paddr[31:21] & !AM[31:21] = BA[31:21] & !AM[31:21] In the above equation, “paddr” represents the accessed physical address, “&” represents the AND of each bit, and “!” represents the logical NOT of each bit. Operation is undefined when multiple channels are simultaneously selected, or when external bus controllers or PCI controllers are simultaneously selected. |
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