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TMPR4925 Datasheet(PDF) 236 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 236 Page - Toshiba Semiconductor |
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236 / 590 page ![]() Chapter 9 SDRAM Controller 9-8 Table 9.3.3 Address Signal Mapping (16-bit Data Bus) (2/2) Row Address Width = 12 Column Address Width = 11 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 24 25 21 23 L/H 22 21 8 7 6 5 4 3 2 1 Row Address 24 25 21 20 19 18 17 16 15 14 13 12 11 10 9 Row Address Width = 13 Column Address Width = 8 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 22 23 21 20 L/H 23 22 8 7 6 5 4 3 2 1 Row Address 22 23 21 20 19 18 17 16 15 14 13 12 11 10 9 Row Address Width = 13 Column Address Width = 9 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 23 24 21 20 L/H 23 22 8 7 6 5 4 3 2 1 Row Address 23 24 21 20 19 18 17 16 15 14 13 12 11 10 9 Row Address Width = 13 Column Address Width = 10 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 24 25 21 20 L/H 23 22 8 7 6 5 4 3 2 1 Row Address 24 25 21 20 19 18 17 16 15 14 13 12 11 10 9 Row Address Width = 13 Column Address Width = 11 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 25 26 21 24 L/H 23 22 8 7 6 5 4 3 2 1 Row Address 25 26 21 20 19 18 17 16 15 14 13 12 11 10 9 Row Address Width = 13 Column Address Width = 12 Address Bit ADDR [19:5] 19 (B0) 18 (B1) 17 16 SAD DR10 (AP) 14 13 12 11 10 9 8 7 6 5 Column Address 26 27 25 24 L/H 23 22 8 7 6 5 4 3 2 1 Row Address 26 27 21 20 19 18 17 16 15 14 13 12 11 10 9 |
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