CS5535 datasheet(442/555 Pages) NSC

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442

Revision 0.8

GPIO Subsystem Register Descriptions (Continued)

5.16.2.7

GPIO Pull-Up Enable (GPIO[x]_PU_EN)

These registers control enabling of the pull-up on the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. If the fea-

ture bit is high, the pull-up is enabled. If the feature bit is low, the pull-up is disabled.The reset value forces all the pull-ups to

be disabled. (These registers use atomic programming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Pull-Up Enable (GPIOL_PU_EN)

GPIO High Bank Pull-Up Enable (GPIOH_PU_EN)

5.16.2.8

GPIO Pull-Down Enable (GPIO[x]_PD_EN)

These registers control enabling of the pull-down on the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. If the

feature bit is high, the pull-down is enabled. If the feature bit is low, the pull-down is disabled.The reset value forces all the

pull-downs to be disabled. (These registers use atomic programming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Pull-Down Enable (GPIOL_PD_EN)

GPIO High Bank Pull-Down Enable (GPIOH_PD_EN)

GPIO I/O Offset

18h

Type

R/W

Reset Value

1000EFFFh

GPIO I/O Offset

98h

Type

R/W

Reset Value

0000FFFFh

GPIOL_PU_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_PU_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIO I/O Offset

1Ch

Type

R/W

Reset Value

EFFF1000h

GPIO I/O Offset

9Ch

Type

R/W

Reset Value

FFFF0000h

GPIOL_PD_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_PD_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

CS5535 Datasheet(PDF) 442 Page - National Semiconductor (TI)

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