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CS5535 Datasheet(PDF) 502 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 502 Page - National Semiconductor (TI) |
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502 / 555 page ![]() www.national.com 502 Revision 0.8 Flash Controller Register Descriptions (Continued) 5.19.1 Flash Controller Specific MSRs 5.19.1.1 NOR Flash Control (NORF_CTL) Table 5-70. Flash Controller Native Registers Summary Flash Memory Offset Flash I/O Offset Type Width (Bits) Register Name Reset Value Reference 000h-7FFh 00h-03h R/W 8 NAND Device Data (NAND_DATA) Undefined Page 507 Any Even Address between 800h-80Eh 04h R/W 8 NAND Control Register (NAND_CTL) 01h Page 508 Any Odd Address between 801h-80Fh 05h R/W 8 NAND I/O (NAND_IO) 00h Page 508 810h 06h R/W 8 NAND Status (NAND_STS) 0xh Page 509 815h 08h R/W 8 NAND ECC Control (NAND_ECC_CTL) 04h Page 509 811h 09h R/W 8 ECC parity registers contain 22 parity bits. The bit location and definition fol- lows the SmartMedia Physical Format Specifications.NAND ECC LSB Line Parity (NAND_ECC_LSB) FFh Page 510 812h 0Ah R/W 8 NAND ECC MSB Line Parity (NAND_ECC_MSB) FFh Page 511 813h 0Bh R/W 8 NAND ECC Column Parity (NAND_ECC_COL) FFh Page 511 814h 0Ch R/W 8 NAND Line Address Counter (NAND_LAC) 00h Page 511 816h-FFFh 07h, 0Dh-0Fh --- --- Reserved. Reads return 0. Writes have no effect. --- --- MSR Address 51400018h Type R/W Reset Value 00000000h NORF_CTL Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 RSVD NORF_CTL Bit Descriptions Bit Name Description 31:8 RSVD Reserved |
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