UPD64A datasheet(11/66 Pages) RENESAS

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µPD64A, 65

Data Sheet U14380EJ3V0DS00

2. INTERNAL CPU FUNCTIONS

2.1 Program Counter (PC): 11 Bits

This is a binary counter that holds the address information of the program memory.

Figure 2-1. Program Counter Configuration

The program counter contains the address of the instruction that should be executed next. Normally, the counter

contents are automatically incremented in accordance with the instruction length (byte count) each time an

instruction is executed.

However, when executing jump instructions (JMP, JC, JNC, JF, JNF), the program counter contains the jump

destination address written in the operand.

When executing the subroutine call instruction (CALL), the call destination address written in the operand is

entered in the PC after the PC contents at the time are saved to the address stack register (ASR).

If the return

instruction (RET) is executed after the CALL instruction is executed, the address saved to the ASR is restored to

the PC.

After reset, the value of the program counter becomes “000H”.

2.2 Stack Pointer (SP): 1 Bit

This is a 1-bit register that holds the status of the address stack register.

The stack pointer contents are incremented when the call instruction (CALL) is executed; they are decremented

when the return instruction (RET) is executed.

After reset, the stack pointer contents are cleared to “0”.

When the stack pointer overflows (stack level 2 or more) or underflows, the CPU is hung up, causing a system

reset signal to be generated and the PC to be cleared to “000H”.

As no instruction is available to set a value directly for the stack pointer, it is not possible to operate the pointer

by means of a program.

2.3 Address Stack Register (ASR (RF)): 11 Bits

The address stack register saves the return address of the program after a subroutine call instruction is executed.

The lower 8 bits are allocated to the RF of the data memory as a dual-function RAM.

The register holds the

ASR value even after the RET is executed.

After reset, it holds the previous data (undefined when turning on the power).

Caution If the RF is accessed as the data memory, the higher 3 bits of the ASR become undefined.

Figure 2-2.

Address Stack Register Configuration

PC9

PC10

PC0

PC8

PC7

PC6

PC5

PC4

PC3

PC2

PC1

ASR10

ASR9

ASR8

ASR7

ASR6

ASR5

ASR4

ASR3

ASR2

ASR1

ASR0

ASR

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