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MRF24J40 Datasheet(PDF) 22 Page - Microchip Technology |
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MRF24J40 Datasheet(HTML) 22 Page - Microchip Technology |
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22 / 151 page ![]() MRF24J40 DS30009776E-page 22 Preliminary 2021 Microchip Technology Inc. 2.15.3 SHORT ADDRESS CONTROL REGISTERS DETAIL REGISTER 2-1: RXMCR: RECEIVE MAC CONTROL REGISTER (ADDRESS: 0x00) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 r r NOACKRSP r PANCOORD COORD ERRPKT PROMI bit 7 bit 0 Legend: r = reserved R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-6 Reserved: Maintain as ‘0’ bit 5 NOACKRSP: Automatic Acknowledgement Response bit 1 = Disables automatic Acknowledgement response 0 = Enables automatic Acknowledgement response. Acknowledgements are returned when they are requested (default). bit 4 Reserved: Maintain as ‘0’ bit 3 PANCOORD: PAN Coordinator bit 1 = Set device as PAN coordinator 0 = Device is not set as PAN coordinator (default) bit 2 COORD: Coordinator bit 1 = Set device as coordinator 0 = Device is not set as coordinator (default) bit 1 ERRPKT: Packet Error Mode bit 1 = Accept all packets including those with CRC error 0 = Accept only packets with good CRC (default) bit 0 PROMI: Promiscuous Mode bit 1 = Receive all packet types with good CRC 0 = Discard packet when there is a MAC address mismatch, illegal frame type, dPAN/sPAN or MAC short address mismatch (default) |
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