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MRF24J40 Datasheet(PDF) 72 Page - Microchip Technology |
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MRF24J40 Datasheet(HTML) 72 Page - Microchip Technology |
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72 / 151 page ![]() MRF24J40 DS30009776E-page 72 Preliminary 2021 Microchip Technology Inc. REGISTER 2-76: REMCNTL: REMAIN COUNTER LOW REGISTER (ADDRESS: 0x224) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 REMCNT7 REMCNT6 REMCNT5 REMCNT4 REMCNT3 REMCNT2 REMCNT1 REMCNT0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-0 REMCNT[7:0]: Remain Counter bits Remain counter is a 16-bit counter. Together with the main counter times events: Beacon Interval (BI) and inactive period for beacon-enabled devices and Sleep interval for nonbeacon-enabled devices. Units: tick (50 ns). REGISTER 2-77: REMCNTH: REMAIN COUNTER HIGH REGISTER (ADDRESS: 0x225) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 REMCNT15 REMCNT14 REMCNT13 REMCNT12 REMCNT11 REMCNT10 REMCNT9 REMCNT8 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-0 REMCNT[15:8]: Remain Counter bits Remain counter is a 16-bit counter. Together with the main counter times events: Beacon Interval (BI) and inactive period for beacon-enabled devices and Sleep interval for nonbeacon-enabled devices. Units: tick (50 ns). |
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