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MRF24J40T-I/ML Datasheet(PDF) 17 Page - Microchip Technology |
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MRF24J40T-I/ML Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 151 page  2021 Microchip Technology Inc. Preliminary DS30009776E-page 17 MRF24J40 2.15.2 CONTROL REGISTER SUMMARY TABLE 2-6: SHORT ADDRESS CONTROL REGISTER SUMMARY FOR MRF24J40 Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR Details on Page: 0x00 RXMCR r rNOACKRSP r PANCOORD COORD ERRPKT PROMI 0000 0000 22 0x01 PANIDL PAN ID Low Byte (PANIDL[7:0]) 0000 0000 23 0x02 PANIDH PAN ID High Byte (PANIDH[15:8]) 0000 0000 23 0x03 SADRL Short Address Low Byte (SADRL[7:0]) 0000 0000 24 0x04 SADRH Short Address High Byte (SADRH[15:8]) 0000 0000 24 0x05 EADR0 64-Bit Extended Address bits (EADR0[7:0]) 0000 0000 25 0x06 EADR1 64-Bit Extended Address bits (EADR1[15:8]) 0000 0000 25 0x07 EADR2 64-Bit Extended Address bits (EADR2[23:16]) 0000 0000 25 0x08 EADR3 64-Bit Extended Address bits (EADR3[31:24]) 0000 0000 26 0x09 EADR4 64-Bit Extended Address bits (EADR4[39:32]) 0000 0000 26 0x0A EADR5 64-Bit Extended Address bits (EADR5[47:40]) 0000 0000 26 0x0B EADR6 64-Bit Extended Address bits (EADR6[55:48]) 0000 0000 27 0x0C EADR7 64-Bit Extended Address bits (EADR7[63:56]) 0000 0000 27 0x0D RXFLUSH r WAKEPOL WAKEPAD r CMDONLY DATAONLY BCNONLY RXFLUSH 0000 0000 28 0x0E Reserved r r r r r r r r 0000 0000 — 0x0F Reserved r r r r r r r r 0000 0000 — 0x10 ORDER BO3 BO2 BO1 BO0 SO3 SO2 SO1 SO0 1111 1111 29 0x11 TXMCR NOCSMA BATLIFEXT SLOTTED MACMINBE1 MACMINBE0 CSMABF2 CSMABF1 CSMABF0 0001 1100 30 0x12 ACKTMOUT DRPACK MAWD6 MAWD5 MAWD4 MAWD3 MAWD2 MAWD1 MAWD0 0011 1001 31 0x13 ESLOTG1 GTS1-3 GTS1-2 GTS1-1 GTS1-0 CAP3 CAP2 CAP1 CAP0 0000 0000 32 0x14 SYMTICKL TICKP7 TICKP6 TICKP5 TICKP4 TICKP3 TICKP2 TICKP1 TICKP0 0100 0000 33 0x15 SYMTICKH TXONT6 TXONT5 TXONT4 TXONT3 TXONT2 TXONT1 TXONT0 TICKP8 0101 0001 33 0x16 PACON0 PAONT7 PAONT6 PAONT5 PAONT4 PAONT3 PAONT2 PAONT1 PAONT0 0010 1001 34 0x17 PACON1 r r r PAONTS3 PAONTS2 PAONTS1 PAONTS0 PAONT8 0000 0010 34 0x18 PACON2 FIFOEN r TXONTS3 TXONTS2 TXONTS1 TXONTS0 TXONT8 TXONT7 1000 1000 35 0x19 Reserved r r r r r r r r 0000 0000 — 0x1A TXBCON0 r r r r r r TXBSECEN TXBTRIG 0000 0000 36 0x1B TXNCON r r r FPSTAT INDIRECT TXNACKREQ TXNSECEN TXNTRIG 0000 0000 37 0x1C TXG1CON TXG1RETRY1 TXG1RETRY0 TXG1SLOT2 TXG1SLOT1 TXG1SLOT0 TXG1ACKREQ TXG1SECEN TXG1TRIG 0000 0000 38 0x1D TXG2CON TXG2RETRY1 TXG2RETRY0 TXG2SLOT2 TXG2SLOT1 TXG2SLOT0 TXG2ACKREQ TXG2SECEN TXG2TRIG 0000 0000 38 Legend: r = reserved |
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