UPD72042B datasheet(21/92 Pages) RENESAS

21 / 92 page

µPD72042B

Data Sheet S13990EJ3V0DS

Fig. 2-2

Slave Status (SSR) Bit Format

MSB

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

LSB

Table 2-5

Slave Status Meanings

Bit

Value

Meaning

Bit 0Note 1

The slave transmission buffer is empty.

The slave transmission buffer is not empty.

Bit 1Note 2

The slave reception buffer is empty.

The slave reception buffer is not empty.

Bit 2

The unit is not locked.

The unit is locked.

Bit 3

Fixed at 0

Bit 4Note 3

Slave transmission disabled

Slave transmission enabled

Bit 5

Fixed at 0

Bit 7

Mode 0

Bit 6

Mode 1

Reserved for future expansion

Indicates the highest

mode supported by the

unitNote 4.

Notes 1. The slave transmission buffer is accessed during a data read operation (control bits: 3H, 7H).

For the

µPD72042B, this buffer corresponds to the TBF available when STRQ of the FLG register is set

to 1.

2. The slave reception buffer is accessed during a data write operation (control bits: 8H, AH, BH, EH, FH).

For the

µPD72042B, this buffer corresponds to the RBF available when SLRE of the FLG register is set

to 1.

3. The value of bit 4 can be selected by using the UAR1 register.

4. Bits 7 and 6 are currently fixed to 10 in the hardware of the

µPD72042B.

(2) Data/command transfer (control bits: Read (3H, 7H), write (AH, BH, EH, FH))

When data read (3H, 7H) is set, the data in the data buffer of the slave unit is read into the master unit.

When data write (BH, FH) or command write (AH, EH) is set, the data received by the slave unit is processed

according to the operation specifications for the slave unit.

Remarks 1. The user can select data and commands as necessary according to the system.

2. 3H, AH, and BH may cause locking, depending on the communication conditions and status.

UPD72042B Datasheet(PDF) 21 Page - Renesas Technology Corp

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