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APEX20K Datasheet(PDF) 68 Page - Altera Corporation

Part # APEX20K
Description  Programmable Logic Device Family
PDF  117 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

APEX20K Datasheet(HTML) 68 Page - Altera Corporation

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Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
All specifications are always representative of worst-case supply voltage
and junction temperature conditions. All output-pin-timing specifications
are reported for maximum driver strength.
Figure 36 shows the fMAX timing model for APEX 20K devices.
Figure 36. APEX 20K fMAX Timing Model
Figure 37 shows the fMAX timing model for APEX 20KE devices. These
parameters can be used to estimate fMAX for multiple levels of logic.
Quartus II software timing analysis should be used for more accurate
timing information.
SU
H
CO
LUT
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ESBRC
ESBWC
ESBWESU
ESBDATASU
ESBADDRSU
ESBDATACO1
ESBDATACO2
ESBDD
PD
PTERMSU
PTERMCO
t
t
t
F1—4
F5—20
F20+
LE
ESB
Routing Delay



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