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UPD754202 Datasheet(PDF) 28 Page - Renesas Technology Corp |
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UPD754202 Datasheet(HTML) 28 Page - Renesas Technology Corp |
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28 / 68 page  Figure 7-1. Interrupt Control Circuit Block Diagram Internal bus Interrupt enable flag (IE ×××) 24 IM2 IM0 Note1 Edge detector INT0/P61 INTBT INTT0 INTT1 INTT2 IRQBT IRQ0 IRQT0 IRQT1 IRQT2 IRQ2 KR4/P70 KR7/P73 Falling edge detectorNote 2 Key return reset circuit IM2 IME IPS IST1 IST0 Decoder VRQn Priority control circuit Standby release signal Vector table address generator Notes 1. Noise eliminator (Standby release is disabled when noise eliminator is selected.) 2. The INT2 pin is not available. Interrupt request flag (IRQ2) is set at the KRn pin falling edge when IM20 = 1 and IM21 = 0. |
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