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ES9826 Datasheet(PDF) 21 Page - ESS Technology,Inc |
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ES9826 Datasheet(HTML) 21 Page - ESS Technology,Inc |
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21 / 88 page ![]() ES9826 Datasheet VERSION 0.1.2 21 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM S/PDIF S/PDIF output is only available in Master Mode. Register 4[0] MASTER_MODE_ENABLE must be set to 1’b1. Pin Name Description GPIO3/DATA2 HW mode requires for GPIO3/DATA2 pin to be the S/PDIF output. GPIO3 – GPIO6 SW mode allows for any GPIO to be the S/PDIF output. Table 12 - S/PDIF pin connections S/PDIF is transmitted over a single signal line using dual phase encoded data, which allows for clock extraction from the data signal line. |
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