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ES9826 Datasheet(PDF) 12 Page - ESS Technology,Inc

Part # ES9826
Description  32-bit High performance 2 Channel ADC w/PGA
PDF  88 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9826 Datasheet(HTML) 12 Page - ESS Technology,Inc

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ES9826 Datasheet
VERSION 0.1.2
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM
12
GPIO Table
In analog input mode, DC blocking can be enabled and/or disabled by setting GPIO5.
In digital PDM input mode, GPIO4 and GPIO5 are the PDM data and PDM_CLK, respectively.
GPIO3/DATA2 is always the digital data output, either in hardware TDM, PCM, or S/PDIF modes.
GPIO #
Input/Output
HW3 State
HW mode function
DATA2/GPIO3
Output
0 / 1
PCM data
Pull 0 / Pull 1
S/PDIF data
GPIO4
Input
0 / Pull 0
Must connect to Ground
GPIO5
Input
0 / Pull 0
DC Block enable
Table 6 – Analog ADC GPIO functions in Hardware mode
GPIO #
Input/Output
HW3 State
HW mode function
DATA2/GPIO3
Output
0 / 1
PCM data
Pull 0 / Pull 1
S/PDIF data
GPIO4
Input
Pull 1 / 1
PDM data
GPIO5
Output
Pull 1 / 1
PDM clock
Table 7 – Digital PDM GPIO functions in hardware mode
Mute
Set MUTE_MCLK_CTRL (Pin 1) to mute the output while in Hardware Mode:
HW MUTE Control (Pin 1)
Condition
0
Mute (MCLK 24.576MHz)
1
Unmute (MCLK 24.576MHz)
Pull 0
Mute (MCLK 49.152MHz)
Pull 1
Unmute (MCLK 49.152MHz)
Table 8 – Mute Control for HW mode configuration
Note: If MUTE_MCLK_CTRL (Pin 1) is set incorrectly, then it may seem that the ADC has higher noise than specified.



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