WM8599SEFTSLASHV datasheet(40/74 Pages) WOLFSON

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WM8599

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PP Rev 1.0 January 2007

POP AND CLICK PERFORMANCE

The WM8599 includes a number of features designed to minimise pops and clicks in various phases

of operation including power up, power down, changing analogue paths and starting/stopping clocks.

In order to ensure optimum performance, the following sequences should be followed.

POWERUP SEQUENCE

Apply power to the WM8599 (see Power On Reset).

Set-up initial internal biases:

•

SOFT_ST=1

•

FAST_EN=1

•

POBCTRL=1

Enable output drivers to allow the AC coupling capacitors at the output stage to be pre-

charged to DACVMID:

•

VOUTxL_EN=1

•

VOUTxR_EN=1

Enable DACVMID. 500kΩ selected here for optimum pop reduction:

•

VMID_SEL=10

Wait until DACVMID has fully charged. The time is dependent on the capacitor values

used to AC-couple the outputs and to decouple DACVMID, and the VMID_SEL value

chosen. An approximate delay of 6xRCms can be used, where R is the DACVMID

resistance and C is the decoupling capacitor on DACVMID. For DACVMID resistance of

50kΩ and C=4.7uF, the delay should be approximately 1.5 seconds.

•

Insert delay

Enable the master bias and DACVMID buffer:

•

BIAS_EN=1

•

BUFIO_EN=1

Switch the output drivers to use the master bias instead of the power up (fast) bias:

•

POBCTRL=0

Enable all functions (DACs, ADC, PGAs) required for use. Outputs are muted by default so

the write order is not important.

Unmute the outputs and switch DACVMID resistance to 50k for normal operation:

•

VOUTxL_MUTE=0

•

VOUTxR_MUTE=0

•

VMID_SEL=01

POWERDOWN SEQUENCE

Mute all outputs:

•

MUTE_ALL=1

Set up biases for power down mode:

•

FAST_EN=1

•

VMID_SEL=01

•

BIAS_EN=1

WM8599SEFT/V Datasheet(PDF) 40 Page - Wolfson Microelectronics plc

WM8599SEFT/V Datasheet(HTML) 40 Page - Wolfson Microelectronics plc

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