Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

AT83SND2CMP3B Datasheet(PDF) 167 Page - ATMEL Corporation

Part # AT83SND2CMP3B
Description  Single-Chip Flash Microcontroller with MP3 Decoder with Full Audio Interface
PDF  241 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND2CMP3B Datasheet(HTML) 167 Page - ATMEL Corporation

Back Button AT83SND2CMP3B Datasheet HTML 163Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 164Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 165Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 166Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 167Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 168Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 169Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 170Page - ATMEL Corporation AT83SND2CMP3B Datasheet HTML 171Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 167 / 241 page
background image
167
4341F–MP3–03/06
AT8xC51SND2C/MP3B
Table 19-3.
SPSTA Register
SPSTA (S:C4h) – SPI Status Register
Reset Value = 00000 0000b
Table 19-4.
SPDAT Register
SPDAT (S:C5h) – Synchronous Serial Data Register
Reset Value = XXXX XXXXb
76
543
210
SPIF
WCOL
-
MODF
-
-
-
-
Bit Number
Bit
Mnemonic
Description
7
SPIF
SPI Interrupt Flag
Set by hardware when an 8-bit shift is completed.
Cleared by hardware when reading or writing SPDAT after reading SPSTA.
6WCOL
Write Collision Flag
Set by hardware to indicate that a collision has been detected.
Cleared by hardware to indicate that no collision has been detected.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4MODF
Mode Fault
Set by hardware to indicate that the SS pin is at an appropriate level.
Cleared by hardware to indicate that the SS pin is at an inappropriate level.
3 - 0
-
Reserved
The value read from these bits is indeterminate. Do not set these bits.
76
543
210
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
Bit Number
Bit
Mnemonic
Description
7 - 0
SPD7:0
Synchronous Serial Data.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com