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AT83SND2CMP3B Datasheet(PDF) 196 Page - ATMEL Corporation

Part # AT83SND2CMP3B
Description  Single-Chip Flash Microcontroller with MP3 Decoder with Full Audio Interface
PDF  241 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND2CMP3B Datasheet(HTML) 196 Page - ATMEL Corporation

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196
4341F–MP3–03/06
AT8xC51SND2C/MP3B
Table 21-9.
SSCON Register
SSCON (S:93h) – Synchronous Serial Control Register
Reset Value = 0000 0000b
76
543
210
SSCR2
SSPE
SSSTA
SSSTO
SSI
SSAA
SSCR1
SSCR0
Bit Number
Bit
Mnemonic
Description
7
SSCR2
Synchronous Serial Control Rate Bit 2
Refer to Table 21-1 for rate description.
6
SSPE
Synchronous Serial Peripheral Enable Bit
Set to enable the controller.
Clear to disable the controller.
5
SSSTA
Synchronous Serial Start Flag
Set to send a START condition on the bus.
Clear not to send a START condition on the bus.
4
SSSTO
Synchronous Serial Stop Flag
Set to send a STOP condition on the bus.
Clear not to send a STOP condition on the bus.
3
SSI
Synchronous Serial Interrupt Flag
Set by hardware when a serial interrupt is requested.
Must be cleared by software to acknowledge interrupt.
2
SSAA
Synchronous Serial Assert Acknowledge Flag
Set to enable slave modes. Slave modes are entered when SLA or GCA (if SSGC set) is
recognized.
Clear to disable slave modes.
Master Receiver Mode in progress
Clear to force a not acknowledge (high level on SDA).
Set to force an acknowledge (low level on SDA).
Master Transmitter Mode in progress
This bit has no specific effect when in master transmitter mode.
Slave Receiver Mode in progress
Clear to force a not acknowledge (high level on SDA).
Set to force an acknowledge (low level on SDA).
Slave Transmitter Mode in progress
Clear to isolate slave from the bus after last data Byte transmission.
Set to enable slave mode.
1
SSCR1
Synchronous Serial Control Rate Bit 1
Refer to Table 21-1 for rate description.
0
SSCR0
Synchronous Serial Control Rate Bit 0
Refer to Table 21-1 for rate description.



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