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PCA9421 Datasheet(PDF) 13 Page - NXP Semiconductors

Part # PCA9421
Description  Power management IC for low-power microcontroller applications
PDF  66 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9421 Datasheet(HTML) 13 Page - NXP Semiconductors

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NXP Semiconductors
PCA9421
Power management IC for low-power microcontroller applications
1. Mode setting remains the same, but the user chooses to change one or some of the enabled output rail
voltage by programming its output voltage I2C register setting
2. Mode setting changes by setting different values on MODESEL0/MODESEL1 pins or MODE0_I2C/
MODE1_I2C bits, and it causes one or some of the output rail voltage change
In such case, the SYSRSTn signal does NOT assert when any of the enabled voltage rail output voltage is in
the middle of the transition from initial output voltage level to target level.
8.10 Watchdog timer
PCA9421 provides an on-chip watchdog timer, the duration of this watchdog can be programmed via I2C
register setting (WD_TIMER_x [1:0] in each mode configuration registers), or disabled if needed in each mode
setting.
Upon initial enable, the watchdog timer starts counting. If the watchdog timer expires before reset, an interrupt
signal is issued (WD_TIMER).
When the watchdog timer expires, the following operations are expected:
1. The SYSRSTn signal asserted (HIGH to LOW)
2. All settings for LDO1/LDO2/SW1/SW2 set to Mode 0 settings
The following events reset the watchdog timer:
1. When WD_TIMER_CLR bit is set to 3b’001 at 0Dh register
2. When the device changes the mode settings
8.11 Regulators
There are four regulators on PCA9421, which include two buck regulators and two LDOs. Table 5 shows the
outline for each regulator:
Regulator name
Output regulation voltage range
Adjustable resolution
Max output current
SW1 (Core Buck)
0.5 V to 1.5 V and a fixed 1.8 V
25 mV/step
Up to 250 mA
SW2 (System Buck)
1.5 V to 2.1 V or 2.7 V to 3.3 V
25 mV/step
Up to 500 mA
LDO1 (Always-on LDO) 1.7 V to 1.9 V
25 mV/step
Up to 1 mA
LDO2 (System LDO)
1.5 V to 2.1 V or 2.7 V to 3.3 V
25 mV/step
Up to 250 mA
Table 5.  Regulator summary
For each rail, its output target voltage can be set independently in mode setting 0, 1, 2 or 3. User can also
choose to switch among any of the mode settings.
8.11.1 Enable/disable and active discharge
Enable/disable: Each rail can be enabled/disabled via I2C register setting independently in each mode setting.
Active discharge: Additionally, there is an active discharge resistor on each rail, and the user can choose to
enable/disable such feature through I2C register setting, so that when the output rail is disabled, it can quickly
discharge the output voltage to ground. In addition, the active discharge is also enabled during voltage step
down. This can be disabled by MTP bit.
If the active discharge bleeding resistor is enabled AND there is a change to the output voltage of the buck
regulators to a lower value (i.e. from 0.9 V to 0.75 V) there could be a small voltage peak of 5 % higher than
the initial voltage (for 10 µs) during the transition. If this behavior is not desired, the bleeding resistor can be
PCA9421
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 1.0 — 16 October 2023
13 / 66



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