100 Pin Super I/O with LPC Interface for Notebook Applications

SMSC DB – LPC47N227

Page 3

Rev. 03-29-07

PRODUCT PREVIEW

BLOCK DIAGRAM

TXD1, nRTS1, nDTR1

nWDATA nRDATA

SER_IRQ

PCI_CLK

Vcc Vss

nIO_PME

Denotes Multifunction Pins

IRTX2, IRMODE*,

TXD2, nRTS2, nDTR2

IRRX2, IRRX3*,

RXD2, nCTS2,

nDSR2, nDCD2, nRI2

SERIAL

IRQ

LPC BUS

INTERFACE

V

TR

CLOCK

GEN

CLOCKI

nMTR0, nDS0, nDIR,

nSTEP, DRVDEN0*,

nWGATE, HDSEL,

DRVDEN1*, nWDATA

SMSC

PROPRIETARY

82077

COMPATIBLE

VERTICAL

FLOPPY DISK

CONTROLLER

CORE

SMI PME WDT

DIGITAL

DATA

SEPERATOR

PRE-

COMPENSATION

nTRK0,

nDSKCHG,

nINDEX,

nWRTPRT,

nRDATA

*

16C550

COMPATIBLE

SERIAL

PORT 1

WDATA

WCLOCK

RCLOCK

RDATA

nCTS1, RXD1,

nDSR1, nDCD1, nRI1

CONFIGURATION

REGISTERS

GENERAL

PURPOSE

I/O

GP10, GP11,

GP12*, GP13*,

GP14*,

GP1[5:7],

GP2[0:2],

GP23*, GP24,

GP3[0:7],

GP4[0:7]

MULTI-MODE

PARALLEL

PORT/FDC

MUX

PD[0:7],

BUSY, SLCT,

PE, nERROR, nACK

nSLCTIN, nALF

nINIT, nSTROBE

CONTROL, ADDRESS, DATA

LAD0

LAD1

LAD2

LAD3

nLFRAME

nLDRQ

nLPCPD

nPCI_RESET

ACPI

BLOCK

nIO_SMI*

16C550

COMPATIBLE

SERIAL

PORT 2 WITH

INFRARED

INTERFACE

nCLKRUN

IRQIN1*, IRQIN2*,

FDC_PP*