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P83CL882T/001 Datasheet(PDF) 32 Page - NXP Semiconductors |
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P83CL882T/001 Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 88 page ![]() 2001 Jun 19 32 Philips Semiconductors Product specification 80C51 Ultra Low Power (ULP) telephony controller P83CL882 6.5 Timer 0 and Timer 1 event counters Timer 0 and Timer 1 can perform the following functions: • Measure time intervals and pulse durations • Count events • Measure CPU speed • Generate interrupt requests. Timer 0 and Timer 1 can be programmed independently to operate in four modes: Mode 0 8-bit timer or 8-bit counter each with divide-by-32 prescaler. Mode 1 16-bit time interval or event counter. Mode 2 8-bit time interval or event counter with automatic reload upon overflow. Mode 3 Timer 1 stopped and Timer 0 operates as two separate counters. A block diagram of Timer 0 and Timer 1 with possible clock sources is shown in Fig.15. Table 37 Timer/counter 0 and Timer/counter 1 related SFRs SFR DESCRIPTION SFR ADDRESS RESET VALUE TCON Timer/counter 0 and Timer/counter 1 Control Register 88H 0000 0000 TMOD Timer/counter 0 and 1 Mode Control Register 89H 0000 0000 SYSCON System Control Register B4H 0000 0000 MGT292 C/T = 0 C/T = 1 TL1 TH1 TH0 C/T = 0 C/T = 1 TL0 T0 TR0 control GATE INT0 T1 TR1 GATE INT1 ROMReq fper fpsc InstrReq fper fpsc control Fig.15 Timer/counter 0 and 1; clock sources and control logic. |
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