P83CL882TSLASH001 datasheet(37/88 Pages) PHILIPS

37 / 88 page

2001 Jun 19

Philips Semiconductors

Product speciﬁcation

80C51 Ultra Low Power (ULP) telephony controller

P83CL882

6.6

Timer 2

Timer 2 is a 16-bit timer/counter which can operate as either an event timer or an event counter. Timer 2 has three

operating modes: capture, auto-reload up/down counting and clock output mode. The modes are selected using T2CON.

6.6.1

TIMER 2SPECIAL FUNCTION REGISTERS

Timer 2 has six SFRs that can be read and written by the CPU. These registers are: T2CON, T2MOD, T2H, T2L, T2RCH

and T2RCL. Timer 2 register values can be changed by hardware or software. If an update by hardware and software

occurs in one of the registers T2H, T2L, T2RCH or T2RCL, the update by software has precedence.

Table 47 Timer 2 related SFRs

6.6.1.1

Timer 2 Control Register (T2CON)

Table 48 Timer 2 Control Register (SFR address C8H)

Table 49 Description of T2CON bits

SFR

DESCRIPTION

SFR ADDRESS

RESET VALUE

T2CON

Timer 2 Control Register

C8H

00XX 0000

T2MOD

Timer 2 Mode Register

C9H

XXXX X000

T2L

Timer 2 Low byte Count Register

CCH

0000 0000

T2H

Timer 2 High byte Count Register

CDH

0000 0000

T2RCL

Timer 2 Low byte Capture/Reload Register

CAH

0000 0000

T2RCH

Timer 2 High byte Capture/Reload Register

CBH

0000 0000

76543210

T2F

EXF2

−−

EXEN2

TR2

C/T2

CP/RL2

BIT

SYMBOL

DESCRIPTION

T2F

Timer 2 overﬂow ﬂag. Set by a Timer 2 overflow and must be cleared by software. TF2

will not be set when clock out mode is selected.

EXF2

Timer 2 external ﬂag. Set on a negative transition on T2EX and bit EXEN2 = 1. In

Auto-reload mode it is toggled on an under- or overﬂow; this bit must be cleared by

software.

5 and 4

−

These 2 bits are reserved each must be set to logic 0.

EXEN2

Timer 2 external enable ﬂag. Set by software only; when set, allows a capture or

reload to occur, together with an interrupt, as a result of a negative transition on input

T2EX if in Capture mode or Auto-reload mode with DCEN reset. If in Auto-reload mode

and DCEN is set, the EXEN2 bit has no inﬂuence. In the other modes EXF2 is set and

an interrupt is generated on a HIGH-to-LOW transition on the T2EX pin. When EXEN2

is reset, Timer 2 ignores events on pin T2EX in all modes.

TR2

START/STOP control for Timer 2. Set by software only; when set, the timer is started;

when reset the timer is stopped.

If Timer 2 is not enabled (TR2 = 0), the clock to Timer 2 is switched off for power saving.

1C/T2

Timer/counter select for Timer 2. Set by software only; when set the counter function

is selected, when reset the timer function is selected.

CP/RL2

Capture/Reload ﬂag. Set by software only; selection of mode capture or reload; when

set the capture function is selected, when reset the reload function is selected.

P83CL882T/001 Datasheet(PDF) 37 Page - NXP Semiconductors

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