ST92F124CR1QB datasheet(68/429 Pages) STMICROELECTRONICS

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ST92F124/F150/F250 - REGISTER AND MEMORY MAP

4 REGISTER AND MEMORY MAP

4.1 INTRODUCTION

The ST92F124/F150/F250 register map, memory

map and peripheral options are documented in

this section. Use this reference information to sup-

plement the functional descriptions given else-

where in this document.

4.2 MEMORY CONFIGURATION

The Program memory space of the ST92F124/

F150/F250 up to 256K bytes of directly addressa-

ble on-chip memory, is fully available to the user.

4.2.1 Reset Vector Location

The user power on reset vector must be stored in

the first two physical bytes of memory, 000000h

and 000001h.

4.2.2 Location of Vector for External Watchdog

Refresh

If an external watchdog is used, it must be re-

freshed during TestFlash execution by a user writ-

ten routine. This routine has to be located in Flash

memory, the address where the routine starts has

to be written in 000006h (one word) while the seg-

ment where the routine is located has to be written

in 000009h (one byte).

This routine is called at least once every time that

the TestFlash executes an E3 TM write operation. If

the write operation has a long duration, the user

routine is called with a rate fixed by location

000008h with an internal clock frequency of 2

MHz, location 000008h fixes the number of milli-

seconds to wait between two calls of the user rou-

tine.

Table 14. User Routine Parameters

If location 000006h to 000007h is virgin (FFFFh),

the user routine is not called.

Location

Size

Description

000006h to

000007h

2 bytes

User routine address

000008h

1 byte

ms rate at 2 MHz.

000009h

1 byte

User routine segment

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