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ISO1228DFBR Datasheet(PDF) 8 Page - Texas Instruments

Part # ISO1228DFBR
Description  ISO1228 Eight-Channel Isolated Digital Input with Current Limit and Diagnostics
PDF  44 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ISO1228DFBR Datasheet(HTML) 8 Page - Texas Instruments

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5.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
DW-16
CLR
External clearance(1)
Shortest terminal-to-terminal distance through air
4
mm
CPG
External creepage(1)
Shortest terminal-to-terminal distance across the
package surface
4
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
>17
um
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112
>400
V
Material group
According to IEC 60664-1
II
Overvoltage category per IEC 60664-1
Rated mains voltage ≤ 150 VRMS
I-IV
Overvoltage category per IEC 60664-1
Rated mains voltage ≤ 300 VRMS
I-III
DIN EN IEC 60747-17 (VDE 0884-17) (2)
VIORM
Maximum repetitive peak isolation voltage
AC voltage (bipolar)
637
VPK
VIOWM
Maximum working isolation voltage
AC voltage; Time dependent dielectric breakdown
(TDDB) Test;
450
VRMS
DC voltage
637
VDC
VIOTM
Maximum transient isolation voltage
VTEST = VIOTM, t = 60 s (qualification);
VTEST = 1.2 x VIOTM, t= 1 s (100% production)
4242
VPK
VIMP
Maximum impulse voltage(3)
Tested in air, 1.2/50-us waveform per IEC 62368-1
4000
VPK
VIOSM
Maximum surge isolation voltage(4)
VIOSM ≥ 1.3 x VIMP; Tested in oil (qualification test),
1.2/50-μs waveform per IEC 62368-1
5200
VPK
qpd
Apparent charge(5)
Method a, After Input-output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 x VIORM, tm = 10 s
≤5
pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 x VIORM, tm = 10 s
≤5
Method b: At routine test (100% production);
Vini = 1.2 x VIOTM, tini = 1 s;
Vpd(m) = 1.5 x VIORM, tm = 1 s (method b1) or
Vpd(m) = Vini, tm = tini (method b2)
≤5
CIO
Barrier capacitance, input to output(6)
VIO = 0.4 x sin (2πft), f = 1 MHz
~0.5
pF
RIO
Isolation resistance(6)
VIO = 500 V, TA = 25°C
> 1012
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500 V at TS = 150°C
> 109
Pollution degree
2
Climatic category
40/125/21
UL 1577
VISO
Maximum withstanding isolation voltage
VTEST = VISO , t = 60 s (qualification),
VTEST = 1.2 x VISO , t = 1 s (100% production)
3000
VRMS
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.
Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become
equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed-circuit board are used to help increase these
specifications.
(2)
This isolated digital input is suitable for basic electrical insulation only within the safety ratings. Compliance with the safety ratings shall
be ensured by means of suitable protective circuits.
(3)
Testing is carried out in air to determine the surge immunity of the package.
(4)
Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.
(5)
Apparent charge is electrical discharge caused by a partial discharge (pd).
(6)
All pins on each side of the barrier tied together creating a two-terminal device.
ISO1228
SLLSFN5A – JUNE 2023 – REVISED FEBRUARY 2024
www.ti.com
8
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