| Electronic Components Datasheet Search |
|
PHT4NQ10LT Datasheet(PDF) 3 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PHT4NQ10LT Datasheet(HTML) 3 Page - NXP Semiconductors |
|
3 / 13 page ![]() Philips Semiconductors PHT4NQ10LT N-channel enhancement mode field-effect transistor Product specification Rev. 01 — 11 September 2000 3 of 13 9397 750 07342 © Philips Electronics N.V. 2000. All rights reserved. VGS ≥ 5V Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. Tsp =25 °C; IDM is single pulse Unclamped inductive load; VDD ≤ 15 V; RGS =50 Ω; VGS = 5 V; starting Tj =25 °C and 125 °C. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. Fig 4. Non-repetitive avalanche ruggedness current as a function of pulse duration. 03aa17 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 P der Tsp ( o C) (%) 03aa25 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 I der T sp ( o C) (%) P der P tot P tot 25 C ° () ---------------------- 100% × = I der I D I D25 C ° () ------------------- 100% × = 03ac48 10-2 10-1 1 10 102 110 102 103 VDS I D (A) D.C. 100 ms 10 ms 1 ms tp= 10 µs 100 µs tp tp T P t T δ = RDSon = VDS/ ID 03ac92 10-1 1 10 10-2 10-1 110 tp (ms) IAS (A) Tj prior to avalanche = 125ºC 25ºC |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |