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56F8023 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

Part # 56F8023
Description  16-bit Digital Signal Controllers
PDF  156 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

56F8023 Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc

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56F8023 Signal Pins
56F8023 Data Sheet, Rev. 3
Freescale Semiconductor
21
Preliminary
2.2 56F8023 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
Table 2-3 56F8023 Signal and Package Information for the 32-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
VDD
26
Supply
Supply
I/O Power — This pin supplies 3.3V power to the chip I/O interface.
VSS
13
Supply
Supply
VSS — These pins provide ground for chip logic and I/O drivers.
VSS
27
VDDA
8
Supply
Supply
ADC Power — This pin supplies 3.3V power to the ADC modules. It
must be connected to a clean analog power supply.
VSSA
9
Supply
Supply
ADC Analog Ground — This pin supplies an analog ground to the
ADC modules.
VCAP
25
Supply
Supply
VCAP — Connect this pin to a 4.7μF or greater bypass capacitor in
order to bypass the core voltage regulator, required for proper chip
operation. See Section 10.2.1.
RESET
(GPIOA7)
15
Input
Input/Open
Drain
Output
Input,
internal
pull-up
enabled
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the chip is initialized and placed in the
reset state. A Schmitt trigger input is used for noise immunity. The
internal reset signal will be deasserted synchronous with the internal
clocks after a fixed number of internal clocks.
Port A GPIO — This GPIO pin can be individually programmed as
an input or open drain output pin. Note that RESET functionality is
disabled in this mode and the chip can only be reset via POR, COP
reset, or software reset.
After reset, the default state is RESET.
GPIOA0
(PWM0)
29
Input/
Output
Output
Input,
internal
pull-up
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
PWM0 — This is one of the six PWM output pins.
After reset, the default state is GPIOA0.
Return to Table 2-2



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