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ADN4604ASVZ Datasheet(PDF) 23 Page - Analog Devices |
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ADN4604ASVZ Datasheet(HTML) 23 Page - Analog Devices |
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23 / 40 page ![]() Data Sheet ADN4604 Rev. A | Page 23 of 40 TERMINATION The inputs and outputs include integrated 50 Ω termination resistors. For applications that require external termination resistors, the internal resistors can be disabled. For example, disabling the integrated 50 Ω termination resistors allows alternative termination values such as 75 Ω as shown in Figure 45. Note that the integrated 50 Ω termination resistors are optimal for high data rate digital signaling. Disabling the terminations can reduce the overall performance. The termination control is separated by quadrants (North = Outputs[15:8], South = Outputs[7:0], East = Inputs[15:8], and West = Inputs[7:0]). Table 16 shows the termination control register. A Logic 0 enables the terminations for the respective quadrant. A Logic 1 disables the terminations for the respective quadrant. The terminations are enabled by default. CML 50Ω 50Ω 50Ω 50Ω 75Ω 75Ω VEE VTTOx 50Ω VTTOx VCC VTTIx VTTIx ADN4604 75Ω 75Ω 50Ω 50Ω Rx Figure 45. 75 Ω to 50 Ω Impedance Translator. Table 16. Termination Control Register Address Default Register Name Bit Bit Name Description 0xF0 0x00 Termination control 3 TXN_TERM Output[15:8] (North) termination control 0: Terminations enabled 1: Terminations disabled 2 TXS_TERM Output[7:0] (South) termination control 0: Terminations enabled 1: Terminations disabled 1 RXE_TERM Input[15:8] (East) termination control 0: Terminations enabled 1: Terminations disabled 0 RXW_TERM Input[7:0] (West) termination control 0: Terminations enabled 1: Terminations disabled |
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