R8C2C datasheet(30/58 Pages) RENESAS

30 / 58 page

R8C/2C Group, R8C/2D Group

1. Overview

Rev.2.00

Dec 05, 2007

Page 9 of 585

REJ09B0339-0200

1.3

Block Diagram

Figure 1.3 shows a Block Diagram.

Figure 1.3

Block Diagram

D/A converter

(8 bits

× 2)

R8C/Tiny Series CPU core

System clock generation

circuit

XIN-XOUT

High-speed on-chip oscillator

Low-speed on-chip oscillator

XCIN-XCOUT

Memory

ROM(1)

RAM(2)

Multiplier

R0H

R0L

R1H

R1L

USP

ISP

INTB

FLG

I/O ports

NOTES:

1. ROM size varies with MCU type.

2. RAM size varies with MCU type.

Port P1

Port P3

Port P4

Port P0

Port P2

Port P5

Timers

Timer RA (8 bits

× 1)

Timer RB (8 bits

× 1)

Timer RC (16 bits

× 1)

Timer RD (16 bits

× 2)

Timer RE (8 bits

× 1)

Timer RF (16 bits

× 1)

UART or

clock synchronous serial I/O

(8 bits

× 3)

I2C bus or SSU

(8 bits

× 1)

Peripheral functions

Watchdog timer

(15 bits)

A/D converter

(10 bits

× 20 channels)

LIN module

R8C2C Datasheet(PDF) 30 Page - Renesas Technology Corp

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