TDA9852 datasheet(13/40 Pages) PHILIPS

13 / 40 page

1997 Mar 11

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled BTSC stereo/SAP

decoder and audio processor

TDA9852

CHARACTERISTICS

All voltages are measured relative to GND; VCC = 8.5 V; Rs = 600 Ω; RL =10kΩ; CL = 2.5 nF; AC-coupled; fi = 1 kHz;

Tamb =25 °C; gain control Gv = 0 dB; balance in mid position; loudness off; see Fig.1; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

General

VCC

supply voltage

8.0

8.5

9.0

ICC

supply current

−

Vref

internal reference voltage at

pin Vref

−

4.25

−

Input level adjustment control

GLA

input level adjustment control

−3.5

−

+4.0

Gstep

step resolution

−

0.5

−

Vi(rms)

maximum input voltage level

(RMS value)

−−

input impedance

29.5

40.5

Ω

Stereo decoder

MPXL+R(rms) input voltage level for 100%

modulation L + R; 25 kHz

deviation (RMS value)

input level adjusted via I2C-bus

(L + R; fi = 300 Hz);

monitoring LINE OUT

−

250

−

MPXL−R

input voltage level for 100%

modulation L

− R; 50 kHz

deviation (peak value)

−

707

−

MPX(max)

maximum headroom for L + R,

L, R

fmod < 15 kHz; THD < 15%

−−

MPXpilot(rms) nominal stereo pilot voltage

level (RMS value)

−

STon(rms)

pilot threshold voltage stereo

on (RMS value)

data STS = 1

−−

data STS = 0

−−

SToff(rms)

pilot threshold voltage stereo

off (RMS value)

data STS = 1

−−

data STS = 0

−−

Hys

hysteresis

−

2.5

−

OUTL+R

output voltage level for 100%

modulation L + R at LINE OUT

input level adjusted via I2C-bus

(L + R; fi = 300 Hz);

monitoring LINE OUT

480

500

520

stereo channel separation L/R

at LINE OUT

aligned with dual tone 14%

modulation for each channel;

see Section “Adjustment

procedure” in Chapter

“Functional description”

fL = 300 Hz; fR = 3 kHz

−

fL = 300 Hz; fR = 8 kHz

−

fL = 300 Hz; fR = 10 kHz

−

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