1997 Mar 11

21

Philips Semiconductors

Preliminary specification

decoder and audio processor

TDA9852

Table 4

If more than 1 byte of DATA is transmitted, then auto-increment is performed, starting from the transmitted subaddress

and auto-increment of subaddress in accordance with the order of Table 5 is performed.

Table 5

Subaddress second byte after MAD

Note

1. In auto-increment mode it is necessary to insert 3 dummy data words between volume left and control 1.

Table 6

Definition of third byte, third byte after MAD and SAD

S

SLAVE ADDRESS

R/W

A

SUBADDRESS

A

DATA

A

P

NAME

DESCRIPTION

S

START condition

Standard SLAVE ADDRESS (MAD)

101 101 1

R/W

0 (write)

A

acknowledge; generated by the slave

SUBADDRESS (SAD)

see Table 5

DATA

see Table 6

P

STOP condition

FUNCTION

REGISTER

MSB

LSB

D7

D6

D5

D4

D3

D2

D1

D0

Volume right

VR

0

0

0

0

0

0

0

0

Volume left

VL

0

0

0

0

0

0

0

1

Control 1 (note 1)

CON1

0

0

0

0

0

1

0

1

Control 2

CON2

0

0

0

0

0

1

1

0

Control 3

CON3

0

0

0

0

0

1

1

1

Alignment 1

ALI1

0

0

0

0

1

0

0

0

Alignment 2

ALI2

0

0

0

0

1

0

0

1

Alignment 3

ALI3

0

0

0

0

1

0

1

0

FUNCTION

REGISTER

MSB

LSB

D7

D6

D5

D4

D3

D2

D1

D0

Volume right

VR

0

VR6

VR5

VR4

VR3

VR2

VR1

VR0

Volume left

VL

0

VL6

VL5

VL4

VL3

VL2

VL1

VL0

Control 1

CON1

GMU

AVLON

LOFF

CCD

0

SC2

SC1

SC0

Control 2

CON2

SAP

STEREO

TZCM

1

LMU

EF2

EF1

EF0

Control 3

CON3

0

0

0

0

L3

L2

L1

L0

Alignment 1

ALI1

0

0

0

A14

A13

A12

A11

A10

Alignment 2

ALI2

STS

0

0

A24

A23

A22

A21

A20

Alignment 3

ALI3

ADJ

AT1

AT2

0

1

TC2

TC1

TC0