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TDA9855 Datasheet(PDF) 18 Page - NXP Semiconductors

Part # TDA9855
Description  I2C-bus controlled BTSC stereo/SAP decoder and audio processor
PDF  52 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9855 Datasheet(HTML) 18 Page - NXP Semiconductors

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1997 Nov 04
18
Philips Semiconductors
Product specification
I2C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9855
AUTOMATIC VOLUME LEVEL CONTROL (AVL)
Zi
input impedance
8.8
11.0
13.2
k
Ω
Vi(rms)
maximum input voltage
(RMS value)
THD < 0.2%
2
−−
V
Gv
gain, maximum boost
5
6
7
dB
maximum attenuation
14
15
16
dB
Gstep
equivalent step width between
the input stages
(soft switching system)
−
1.5
−
dB
Vi(rms)
input level at maximum boost
(RMS value)
see Fig.4
−
0.1
−
V
input level at maximum
attenuation (RMS value)
see Fig.4
−
1.125
−
V
Vo(rms)
output level in AVL operation
(RMS value)
see Fig.4
160
200
250
mV
VDC(OFF)
DC offset between different
gain steps
voltage at pin CAV
6.50 to 6.33 V or
6.33 to 6.11 V or
6.11 to 5.33 V or
5.33 to 2.60 V; note 6
−−
6mV
Ratt
discharge resistors for attack
time constant
AT1 = 0; AT2 = 0; note 7
340
420
520
Ω
AT1 = 1; AT2 = 0; note 7
590
730
910
Ω
AT1 = 0; AT2 = 1; note 7
0.96
1.2
1.5
k
Ω
AT1 = 1; AT2 = 1; note 7
1.7
2.1
2.6
k
Ω
Idec
charge current for decay time
normal mode; CCD = 0; note 8 1.6
2.0
2.4
µA
EFFECT CONTROLS
αspat1
anti-phase crosstalk by spatial
effect
−
52
−
%
α
spat2
−
30
−
%
ϕ
phase shift by pseudo-stereo
see Fig.5
−−
−−
VOLUME TONE CONTROL PART (INPUT PINS VIL AND VIR TO PINS OUTX AND OUTS)
Zi
volume input impedance
8.0
10.0
12.0
k
Ω
Zo
output impedance
−
80
120
Ω
RL
output load resistance (AC)
5
−−
k
Ω
CL
output load capacitance
−−
2.5
nF
Vi(rms)
maximum input voltage
(RMS value)
THD < 0.5%
2.0
2.15
−
V
Vno
noise output voltage
CCIR 468-2 weighted;
quasi peak
Gc =16dB
−
110
220
µV
Gc =0dB
−
33
50
µV
mute position
−
10
−µV
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



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