AX88796ALF datasheet(6/68 Pages) ASIX

6 / 68 page

AX88796ALF

3-in-1 Local Bus Fast Ethernet Controller

1.0 Introduction

1.1 General Description:

The AX88796A provides industrial standard NE2000 registers level compatible instruction set. Various drivers are easy

acquired, maintenance and usage. No much additional effort to be paid. Software is easily port to various embedded

systems with no pain and tears

The AX88796A Fast Ethernet Controller is a high performance and highly integrated local CPU bus Ethernet Controller

with embedded 10/100Mbps PHY/Transceiver and 8K*16 bit SRAM. The AX88796A supports both 8 bit and 16 bit local

CPU interfaces include MCS-51 series, 80186 series, and MC68K series CPU and ISA bus. The AX88796A implements

both 10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard. The AX88796A also

provides an extra IEEE802.3u compliant media-independent interface (MII) to support other media applications. Using

MII interface, Home LAN PHY type media can be supported.

As well as, the chip also provides optional Standard Print Port (parallel port interface), can be used for printer server device

or treat as simple general I/O port. The chip also support up to 3/1 additional General Purpose In/Out pins

The main difference between AX88796A and AX88796 are listed at notice of AX88796A.

AX88796A use 128-pin LQFP low profile package, 25MHz operation, and single 3.3V operation with 5V I/O tolerance.

1.2 AX88796A Block Diagram:

Fig - 1

AX88796A Block Diagram

MAC

Core

PHY+

Tranceiver

8K* 16 SRAM

and Memory Arbiter

Remote

DMA

FIFOs

NE2000

Registers

Host Interface

STA

SEEPROM

I/F

SD[15:0]

SA[9:0]

Ctl BUS

MII I/F

EECS

EECK

EEDI

EEDO

TPI, TPO

SPP

/ GPIO

Print Port

General

I/O

SMDC

SMDIO

AX88796ALF Datasheet(PDF) 6 Page - ASIX Electronics Corporation

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