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PIC18F85J11 Datasheet(PDF) 56 Page - Microchip Technology |
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PIC18F85J11 Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 396 page ![]() PIC18F85J11 FAMILY DS39774C-page 54 Preliminary © 2007 Microchip Technology Inc. TRISJ PIC18F6XJ11 PIC18F8XJ11 1111 1111 1111 1111 uuuu uuuu TRISH PIC18F6XJ11 PIC18F8XJ11 1111 1111 1111 1111 uuuu uuuu TRISG PIC18F6XJ11 PIC18F8XJ11 0001 1111 0001 1111 uuuu uuuu TRISF PIC18F6XJ11 PIC18F8XJ11 1111 111- 1111 111- uuuu uuu- TRISE PIC18F6XJ11 PIC18F8XJ11 1111 1-11 1111 1-11 uuuu u-uu TRISD PIC18F6XJ11 PIC18F8XJ11 1111 1111 1111 1111 uuuu uuuu TRISC PIC18F6XJ11 PIC18F8XJ11 1111 1111 1111 1111 uuuu uuuu TRISB PIC18F6XJ11 PIC18F8XJ11 1111 1111 1111 1111 uuuu uuuu TRISA(5) PIC18F6XJ11 PIC18F8XJ11 1111 1111(5) 1111 1111(5) uuuu uuuu(5) LATJ PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATH PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATG PIC18F6XJ11 PIC18F8XJ11 00-x xxxx 00-u uuuu uu-u uuuu LATF PIC18F6XJ11 PIC18F8XJ11 xxxx xxx- uuuu uuu- uuuu uuu- LATE PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATD PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATC PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATB PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu LATA(5) PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx(5) uuuu uuuu(5) uuuu uuuu(5) PORTJ PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu PORTH PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu PORTG PIC18F6XJ11 PIC18F8XJ11 000x xxxx 000u uuuu 000u uuuu PORTF PIC18F6XJ11 PIC18F8XJ11 xxxx xxx- uuuu uuu- uuuu uuu- PORTE PIC18F6XJ11 PIC18F8XJ11 xxxx x-xx uuuu u-uu uuuu u-uu PORTD PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu PORTC PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu PORTB PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu PORTA(5) PIC18F6XJ11 PIC18F8XJ11 xx0x 0000(5) uu0u 0000(5) uuuu uuuu(5) SPBRGH1 PIC18F6XJ11 PIC18F8XJ11 0000 0000 0000 0000 uuuu uuuu BAUDCON1 PIC18F6XJ11 PIC18F8XJ11 01-0 0-00 01-0 0-00 uu-u u-uu CCPR1H PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L PIC18F6XJ11 PIC18F8XJ11 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON PIC18F6XJ11 PIC18F8XJ11 --00 0000 --00 0000 --uu uuuu TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets WDT Reset RESET Instruction Stack Resets CM Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 4: See Table 4-1 for Reset value for specific condition. 5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read as ‘0’. |
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