PIC18F44J10-ESLASHML datasheet(268/358 Pages) MICROCHIP

268 / 358 page

PIC18F45J10 FAMILY

DS39682C-page 266

Preliminary

MOVFF

Move f to f

Syntax:

MOVFF fs,fd

Operands:

≤ fs ≤ 4095

≤ fd ≤ 4095

Operation:

(fs) → fd

Status Affected:

None

Encoding:

1st word (source)

2nd word (destin.)

1100

1111

ffff

fff

Description:

The contents of source register ‘fs’ are

moved to destination register ‘fd’.

Location of source ‘fs’ can be anywhere

in the 4096-byte data space (000h to

FFFh) and location of destination ‘fd’

can also be anywhere from 000h to

FFFh.

Either source or destination can be W

(a useful special situation).

MOVFF

is particularly useful for

transferring a data memory location to a

peripheral register (such as the transmit

buffer or an I/O port).

The MOVFF instruction cannot use the

PCL, TOSU, TOSH or TOSL as the

destination register.

Words:

Cycles:

2 (3)

Q Cycle Activity:

Decode

Read

(src)

Process

Data

operation

Decode

operation

No dummy

read

operation

Write

(dest)

Example:

MOVFF

REG1, REG2

Before Instruction

REG1

33h

REG2

11h

After Instruction

REG1

33h

REG2

33h

MOVLB

Move Literal to Low Nibble in BSR

Syntax:

MOVLW k

Operands:

≤ k ≤ 255

Operation:

→ BSR

Status Affected:

None

Encoding:

0000

0001

kkkk

Description:

The eight-bit literal ‘k’ is loaded into the

Bank Select Register (BSR). The value

of BSR<7:4> always remains ‘0’,

regardless of the value of k7:k4.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

literal ‘k’

Process

Data

Write literal

‘k’ to BSR

Example:

MOVLB

Before Instruction

BSR Register =

02h

After Instruction

BSR Register =

05h

PIC18F44J10-E/ML Datasheet(PDF) 268 Page - Microchip Technology

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