PIC18F44J10-ESLASHML datasheet(325/358 Pages) MICROCHIP

325 / 358 page

Preliminary

DS39682C-page 323

PIC18F45J10 FAMILY

FIGURE 23-16:

MASTER SSP I2C™ BUS START/STOP BITS TIMING WAVEFORMS

TABLE 23-20: MASTER SSP I2C™ BUS START/STOP BITS REQUIREMENTS

FIGURE 23-17:

MASTER SSP I2C™ BUS DATA TIMING

Note:

Refer to Figure 23-3 for load conditions.

SCLx

SDAx

Start

Condition

Stop

Condition

Param.

No.

Symbol

Characteristic

Min

Max

Units

Conditions

TSU:STA

Start Condition

100 kHz mode

2(TOSC)(BRG + 1)

—

Only relevant for

Repeated Start

condition

Setup Time

400 kHz mode

2(TOSC)(BRG + 1)

—

1 MHz mode(1)

2(TOSC)(BRG + 1)

—

THD:STA Start Condition

100 kHz mode

2(TOSC)(BRG + 1)

—

After this period, the

first clock pulse is

generated

Hold Time

400 kHz mode

2(TOSC)(BRG + 1)

—

1 MHz mode(1)

2(TOSC)(BRG + 1)

—

TSU:STO

Stop Condition

100 kHz mode

2(TOSC)(BRG + 1)

—

Setup Time

400 kHz mode

2(TOSC)(BRG + 1)

—

1 MHz mode(1)

2(TOSC)(BRG + 1)

—

THD:STO Stop Condition

100 kHz mode

2(TOSC)(BRG + 1)

—

Hold Time

400 kHz mode

2(TOSC)(BRG + 1)

—

1 MHz mode(1)

2(TOSC)(BRG + 1)

—

Note 1:

Maximum pin capacitance = 10 pF for all I2C™ pins.

Note:

Refer to Figure 23-3 for load conditions.

100

101

103

106

107

109

110

102

SCLx

SDAx

Out

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