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PIC24HJ12GP201E/ML Datasheet(PDF) 170 Page - Microchip Technology |
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PIC24HJ12GP201E/ML Datasheet(HTML) 170 Page - Microchip Technology |
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170 / 234 page  PIC24HJ12GP201/202 DS70282B-page 168 Preliminary © 2007 Microchip Technology Inc. 18.5 JTAG Interface PIC24HJ12GP201/202 devices implement a JTAG interface, which supports boundary scan device test- ing, as well as in-circuit programming. Detailed infor- mation on this interface will be provided in future revisions of the document. 18.6 Code Protection and CodeGuard™ Security The PIC24HJ12GP201/202 devices offer the intermediate implementation of CodeGuard Security. CodeGuard Security enables multiple parties to securely share resources (memory, interrupts and peripherals) on a single chip. This feature helps protect individual intellectual property in collaborative system designs. When coupled with software encryption libraries, CodeGuard Security can be used to securely update Flash even when multiple IPs reside on the single chip. The code protection features are controlled by the Configuration registers: FBS and FGS. The Secure Segment and RAM is not implemented. TABLE 18-3: CODE FLASH SECURITY SEGMENT SIZES FOR 12K BYTE DEVICES CONFIG BITS BSS<2:0> = x11 0K BSS<2:0> = x10 256 BSS<2:0> = x01 768 BSS<2:0> = x00 1792 Note: Refer to Section 23. “CodeGuard™ Security” (DS70239) of the PIC24H Family Reference Manual for further information on usage, configuration and operation of CodeGuard Security. 001FFEh 0001FEh 000200h 000000h VS = 256 IW 0003FEh 000400h 0007FEh 000800h GS = 3840 IW 000FFEh 001000h 001FFEh 0001FEh 000200h 000000h VS = 256 IW 0003FEh 000400h 0007FEh 000800h 000FFEh 001000h GS = 3584 IW BS = 256 IW 001FFEh 0001FEh 000200h 000000h VS = 256 IW 0003FEh 000400h 0007FEh 000800h 000FFEh 001000h GS = 3072 IW BS = 768 IW 001FFEh 0001FEh 000200h 000000h VS = 256 IW 0003FEh 000400h 0007FEh 000800h GS = 2048 IW 000FFEh 001000h BS = 1792 IW |
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