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HT45F0057 Datasheet(PDF) 33 Page - Holtek Semiconductor Inc |
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HT45F0057 Datasheet(HTML) 33 Page - Holtek Semiconductor Inc |
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33 / 88 page  Rev. 1.00 3� ��to�e� �0� �01� Rev. 1.00 33 ��to�e� �0� �01� HT45F0057 Induction Cooker Flash MCU HT45F0057 Induction Cooker Flash MCU Register Power On Reset LVR Reset WDT Time-out (Normal Operation) WDT Time-out (Powe Down Mode) ACSR - - - - - - 00 - - - - - - 00 - - - - - - 00 - - - - - - uu CTRL1 0000 0000 0000 0000 0000 0000 uuuu uuuu �PAC 0001 0000 0001 0000 0001 0000 uuuu uuuu CTRL� --00 0000 --00 0000 --00 0000 --uu uuuu PWLT xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu CTRL3 -000 0 000 -000 0 000 -000 0 000 -uuu u uuu TMR� xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMR�C ---0 -000 ---0 -000 ---0 -000 ---u -uuu CMPSC 0000 --00 0000 --00 0000 --00 uuuu --uu CMP3C 0001 0000 0001 0000 0001 0000 uuuu uuuu CTRL4 --00 0000 --00 0000 --00 0000 --uu uuuu MFI -000 -000 -000 -000 -000 -000 -uuu -uuu PCRL 0000 000- 0000 000- 0000 000- uuuu uuu- PCRH - - - - - - 00 - - - - - - 00 - - - - - - 00 - - - - - - uu Note: “u” stands for unchanged “x” stands for unknown “-” stands for unimplemented Input/Output Ports Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output designation of every pin fully under user program control, Additionally, as there are pull-high resistors and wake-up configuration options, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities. The device provides bidirectional input/output lines labeled with port names PA~PB. These I/O ports are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose Data Memory table. All of these I/O ports can be used for input and output operations. For input operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge of instruction “MOV A, [m]”, where m denotes the port address. For output operation, all the data is latched and remains unchanged until the output latch is rewritten. Register Name Bit 7 6 5 4 3 2 1 0 PA PA� PA6 PA5 PA4 PA3 PA� PA1 PA0 PAC PAC� PAC6 PAC5 PAC4 PAC3 PAC� PAC1 PAC0 PB — — — PB4 PB3 PB� PB1 PB0 PBC — — — PBC4 PBC3 PBC� PBC1 PBC0 “—”: Unimplemented, read as “0” I/O Logic Function Register List Pull-high Resistors Many product applications require pull-high resistors for their switch inputs usually requiring the use of an external resistor. To eliminate the need for these external resistors, when configured as an input have the capability of being connected to an internal pull-high resistor. These pull-high resistors are selectable via configuration options. The pull-high resistors are implemented using weak PMOS transistors. |
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