AS7058

Package drawings & markings

Short Datasheet

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DS001085

• v1-01 • 2023-Oct-26

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Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fEXTCLK_SYNC

External clock

frequency

Input frequency at pin

EXTCLK_SYNC; Only 2 MHz

or 4 MHz is supported

2

4

MHz

Digital outputs (SDA_MOSI, MISO, INT, GPIO)

VOH

Output high

towards GND

Current load

≤ 6 mA

VIOVDD -

0.4

V

VOL

Output low

towards IOVDD

Current l

oad ≤ 6 mA

0.4

V

5

Package drawings & markings

Figure 2: WLCSP42 package outline drawing

(1) All dimensions are in millimeters. Angles in degrees.

(2) Dimensioning and tolerancing conform to ASME Y14.5M-1994.

(3) N is the total number of terminals.

(4) This package contains no lead (Pb).

(5) This drawing is subject to change without notice.

Top through view

Note s:

Pin 1 = A1

cc c Coplana rity

All dimensions a re in µm

Bottom view (Ball side)

Die size af ter cu ttin g: 25 45 x28 15 ±20

Dev ic e No.

A

B

D

E

F

G

C

1

2

3

4

5

6

A

1

400

400

400

400

400

2500

250

250

80

570±30

200 t y p.

345 t y p.

25 t y p.