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TMS320DM6431 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320DM6431 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 225 page ![]() www.ti.com 2 Device Overview 2.1 Device Characteristics TMS320DM6431 Digital Media Processor SPRS342A – NOVEMBER 2006 – REVISED MARCH 2007 Table 2-1, provides an overview of the TMS320DM6431 DSP. The tables show significant features of the DM6431 device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 2-1. Characteristics of the DM6431 Processor HARDWARE FEATURES DM6431 DDR2 Memory Controller (16-bit bus width) [1.8 V I/O] Asynchronous (8-bit bus width), Asynchronous EMIF [EMIFA] RAM, Flash, (8-bit NOR or 8-bit NAND) EDMA3 1 (64 independent channels, 8 QDMA channels) 2 64-bit General Purpose Timers (configurable as 2 64-bit or 4 32-bit) 1 64-bit Watch Dog Peripherals UART 1 (with RTS and CTS flow control) Not all peripherals pins I2C 1 (Master/Slave) are available at the same time (For more detail, see McBSP 1 the Device Configuration McASP 1 (4 serailizers) section). 10/100 Ethernet MAC (EMAC) with 1 Management Data Input/Output (MDIO) General-Purpose Input/Output Port (GPIO) Up to 111 pins PWM 3 outputs Configurable Video Port 1 Input (VPFE) HECC 1 Size (Bytes) 128KB RAM, 64KB ROM 32K-Byte (32KB) L1 Program (L1P) RAM/Cache (Cache up to 32KB) On-Chip Memory Organization 32KB L1 Data (L1D) RAM/Cache (Cache up to 32KB) 64KB Unified Mapped RAM/Cache (L2) 64KB Boot ROM Revision ID Register (MM_REVID.[15:0]) See the TMS320DM6437/35/33/31 Digital Media MegaModule Rev ID (address location: 0x0181 2000) Processor (DMP) [Silicon Revisions 1.1 and 1.0] Silicon Errata (literature number SPRZ250). CPU ID + CPU Rev ID Control Status Register (CSR.[31:16]) JTAGID register See Section 6.21.1, JTAG ID (JTAGID) Register JTAG BSDL_ID (address location: 0x01C4 0028) Description(s) CPU Frequency MHz 300 Cycle Time ns 3.33 ns (-300) Core (V) 1.2 V (-300) Voltage I/O (V) 1.8 V, 3.3 V MXI/CLKIN frequency multiplier PLL Options x1 (Bypass), x14 to x30 (27 MHz reference) 16 x 16 mm, 0.8 mm pitch 361-Pin BGA (ZWT) BGA Package(s) 23 x 23 mm, 1.0 mm pitch 376-Pin BGA (ZDU) Process Technology µm 0.09 µm Product Preview (PP), Advance Information (AI), Product Status(1) PP or Production Data (PD) (1) PRODUCT PREVIEW information concerns experimental products (designated as TMX) that are in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Submit Documentation Feedback Device Overview 7 |
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